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Wednesday, June 24, 2009


1. GDB:

"display" in three flavors:

display expr
Add the expression expr to the list of expressions to display each time your program stops. See section Expressions.

display does not repeat if you press RET again after using it.

display/fmt expr
For fmt specifying only a display format and not a size or count, add the expression expr to the auto-display list but arrange to display it each time in the specified format fmt. See section Output Formats.

display/fmt addr
For fmt `i' or `s', or including a unit-size or a number of units, add the expression addr as a memory address to be examined each time your program stops. Examining means in effect doing `x/fmt addr'. See section Examining Memory.

Example for the 3rd usage:
display/1xh 0xffc00fc0

This is useful to examine a 16-bit register

2. /proc/devices: show the major number

root:/> cat /proc/devices
Character devices:
1 mem
5 /dev/tty
5 /dev/console
5 /dev/ptmx
10 misc
13 input
128 ptm
136 pts
150 rtpipe
204 ttyBF
254 rtc

Block devices:
1 ramdisk
259 blkext
31 mtdblock

3. About Trace Buffer

Blackfin records every program sequence change in trace buffer, if trace buffer is enabled. There is a 16-entry TBUF register table.

- A bit (TBUGOVF) in the TB control register can enable exception when the TBUF overflows (>16 entry). In the exception handler, TBUF can be read into memory, so that we can record more than 16 traces.
- The trace buffer can be configured to omit the recording of changes in program flow that match either the last entry or one of the last two entries.
- If TBUFOVF = 1, then the Trace Unit does not record discontinuities in the exception, NMI, and reset routines, because TB itself triggers exception.
- Setting TBUFOVF have impact on performance - every 16 sequence change would trigger an exception.

Wednesday, April 15, 2009

bfin spi device




struct spi_device {
struct device dev;
struct spi_master *master;
u32 max_speed_hz;
u8 chip_select;
u8 mode;
#define SPI_CPHA 0x01 /* clock phase */
#define SPI_CPOL 0x02 /* clock polarity */
#define SPI_MODE_0 (0|0) /* (original MicroWire) */
#define SPI_MODE_1 (0|SPI_CPHA)
#define SPI_MODE_2 (SPI_CPOL|0)
#define SPI_CS_HIGH 0x04 /* chipselect active high? */
#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
#define SPI_3WIRE 0x10 /* SI/SO signals shared */
#define SPI_LOOP 0x20 /* loopback mode */
u8 bits_per_word;
int irq;
void *controller_state;
void *controller_data;
const char *modalias;

struct bfin5xx_spi_chip {
u16 ctl_reg;
u8 enable_dma;
u8 bits_per_word;
u8 cs_change_per_word;
u16 cs_chg_udelay; /* Some devices require 16-bit delays */
u32 cs_gpio;
/* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
u16 idle_tx_val;

#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
.enable_dma = 1,
.bits_per_word = 8,
.cs_gpio = GPIO_PF10,


* These structures are used in two places. Their primary role is to
* be stored in tables of board-specific device descriptors, which are
* declared early in board initialization and then used (much later) to
* populate a controller's device tree after the that controller's driver
* initializes. A secondary (and atypical) role is as a parameter to
* spi_new_device() call, which happens after those controller drivers
* are active in some dynamic board configuration models.
struct spi_board_info {
/* the device name and module name are coupled, like platform_bus;
* "modalias" is normally the driver name.
* platform_data goes to,
* controller_data goes to spi_device.controller_data,
* irq is copied too
char modalias[32];
const void *platform_data;
void *controller_data;
int irq;

/* slower signaling on noisy or low voltage boards */
u32 max_speed_hz;

/* bus_num is board specific and matches the bus_num of some
* spi_master that will probably be registered later.
* chip_select reflects how this chip is wired to that master;
* it's less than num_chipselect.
u16 bus_num;
u16 chip_select;

/* mode becomes spi_device.mode, and is essential for chips
* where the default of SPI_CS_HIGH = 0 is wrong.
u8 mode;

/* ... may need additional spi_device chip config data here.
* avoid stuff protocol drivers can set; but include stuff
* needed to behave without being bound to a driver:
* - quirks like clock rate mattering when not selected

static struct spi_board_info bfin_spi_board_info[] __initdata = {


#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
.modalias = "enc28j60",
.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
.irq = IRQ_PF6,
.bus_num = 0,
.chip_select = 0, /* GPIO controlled SSEL */
.controller_data = &enc28j60_spi_chip_info,
.mode = SPI_MODE_0,



static int __init stamp_init(void)
printk(KERN_INFO "%s(): registering device resources\n", __func__);
i2c_register_board_info(0, bfin_i2c_board_info,
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));


later in:
int spi_register_master(struct spi_master *master) -->
static void scan_boardinfo(struct spi_master *master) -->
struct spi_device *spi_new_device(struct spi_master *master, struct spi_board_info *chip)

in spi_new_device(), spi_board_info will be copied to struct spi_device.

spi_board_info.controller_data (i.e enc28j60_spi_chip_info) will be copied to spi_device.controller_data.

In bfin_spi_setup() --> spi_set_ctldata(spi, chip); // this will set spi_device.controller_state.


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